ICs typically include built-in-self-test (BIST) logic that enables embedded memory devices to be tested for defects. In some BIST embodiments, extra circuitry is provided such that, if a defect is detected using the BIST logic, it can be repaired, using either a soft repair procedure or a hard repair procedure. It is known to include a redundant memory portion in an IC memory device that is used to repair a defective portion in the memory device. The redundant memory portion normally is never used unless a defective memory portion is detected and a repair is made. Both hard and soft repair procedures result in the redundant memory portion being used to store the data that would have otherwise been stored in the defective memory portion. In essence, the defective memory portion is remapped to the redundant memory portion.
FIG. 1A illustrates a block diagram of a known memory array 10 having a redundant memory portion 30 and remapping logic 20 for remapping a defective memory portion to the redundant memory portion 30. The arrows 21A-21C represent the normal paths for writing data to and reading data from the memory array 10 when no defects have been detected. Each of bit slices 0-2 has remapping logic 20A-20C, respectively, associated with it for allowing remapping to be performed in the event that a defect in one of bit slices 0-2 is detected. As shown in FIG. 1A, under normal operations (i.e., when no defect has been detected), the redundant bit slice 30 is not used.
FIG. 1B illustrates a block diagram of the memory array 10 and remapping logic 20 shown in FIG. 1A configured by the remapping logic 20 to use the redundant bit slice 30. In this example, a defect 22 has been detected in bit slice 1. In response to this defect 22 being detected, the remapping logic 20 reconfigures remapping blocks 20B and 20C so that the portions of the data paths having an “X” on them are not used and new data paths 31A and 31B are activated. Consequently, the data that would have been stored in defective bit slice 1 via data path 21B is now stored in bit slice 2 via data path 31A and the data that would have been stored in bit slice 2 via data path 21C is now stored in the redundant bit slice 30 via data path 31B. All of the bit slices preceding the defective bit slice continue to be used in the normal manner.
With soft repair, the remapping of the data path is performed by storing values in a remapping register of the remapping logic 20 that cause certain logic gates to be turned on and other logic gates to be turned off, thereby causing certain paths through the logic to be activate and others to be inactive. With soft repair, the BIST is run each time the IC is powered on and the remapping logic is configured to repair the memory device if a defect is detected. Because it is possible in some cases for a defect to appear on one occasion when the IC is powered on and not to appear on another occasion (i.e. the defect is intermittent), remapping may occur on one occasion when the IC is powered on and not occur on another. Therefore, the hardware may not be physically configured the same way all of the time.
With hard repair, the remapping of the data paths happens during the production stage. After the IC has been manufactured, it is tested using the BIST logic on the IC and any failing locations are noted. If a defect has been detected, a physical change is made in the repair circuitry corresponding to the failing location to cause the original data path to be remapped to the new data path. Once the new connections have been made, either by blowing an electrical fuse or by cutting a metal link with a laser, the BIST test is run again to ensure that the defect has been repaired. A hard repair is performed only once, during the manufacturing test stage, and is permanent for the lifetime of the IC.
With the current hard repair procedure, the physical configuration of the memory array does not change after the repair has been made, but there is no mechanism for enabling the user of the IC to determine what the exact physical configuration of the IC is after the repair has been made. As stated above, hard repair is made during production and the associated information is not kept with the individual IC, so the end user of the IC has no way of knowing exactly what repairs were made, or indeed if any repairs were made at all.
With the current soft repair procedure, there is also no mechanism for enabling the configuration of repairs to be determined. Furthermore, because the physical configuration of the memory array may not always be the same each time the IC is powered on, it would be desirable to provide a way to enable a user to determine the exact physical configuration of the memory array at any given time.
Accordingly, a need exists for a method and an apparatus that enable an IC user to determine whether a defect in a memory device has been detected and repaired. A need also exists for a method and an apparatus that enable an IC user to determine the location of a defect as well as the configuration of the memory device after a repair has been made.